Part of the arm64 port.
A reproducible environment that exercises every arm64 mechanism except real SMMU behaviour:
- QEMU -M virt,secure=on,gic-version=3,its=on -cpu max with TF-A (BL1/BL2/BL31 with SDEI and PSCI) booting the host at EL2, several vCPUs, one or two virtio-pci devices to assign.
- Host kernel config: CONFIG_MULTIKERNEL=y, ARM_SDE_INTERFACE, ARM64_PSEUDO_NMI, KEXEC_FILE.
- kerf (tools/multikernel/ or the multikernel/kerf repo) support for arm64: Image instead of vmlinux/bzImage, DTB handling, MPIDR-based CPU names.
- Scripted smoke test: spawn on 2 CPUs, message round-trip over the ring, graceful halt (all CPUs OFF), forced halt, re-spawn, CPU hot-add to a running spawn.
- Document under Documentation/multikernel/ (arm64 section in usage.rst).
Real hardware target after QEMU: an SBSA server (Neoverse-based, PSCI + GICv3 + ITS + ECAM + TF-A/SDEI).
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Part of the arm64 port.
A reproducible environment that exercises every arm64 mechanism except real SMMU behaviour:
Real hardware target after QEMU: an SBSA server (Neoverse-based, PSCI + GICv3 + ITS + ECAM + TF-A/SDEI).