Part of the RISC-V port.

• QEMU virt with OpenSBI (-bios default), both aia=none (PLIC + SBI IPI) and aia=aplic-imsic (AIA path), several harts, virtio-pci devices to assign.
• Host config: CONFIG_MULTIKERNEL=y, RISCV_SBI, KEXEC_FILE, HOTPLUG_CPU, RISCV_APLIC, RISCV_IMSIC, SIFIVE_PLIC.
• kerf support for RISC-V: Image loading, DTB handling, hartid-based CPU names (sparse hartids).
• Scripted smoke test: spawn on 2 harts, ring round-trip, graceful halt (all harts STOPPED), poweroff/reboot inside the spawn leaves the host alive, 50x re-spawn loop (I-cache stub), hart hot-add to a running spawn.
• Docs: RISC-V section in Documentation/multikernel/usage.rst, including the fence.i stub rationale and the SRST hazard.

Hardware after QEMU: SG2042 (Milk-V Pioneer: 64 harts, PLIC, PCIe) for the PLIC path at a scale where multikernel matters.