Commit 2358296
deps: V8: cherry-pick 1441665e0d87
Original commit message:
[riscv] Fix the RISC-V build.
Due to recent changes, there were missing implementations of various
methods needed in the simulator and Maglev. Additionally, a static_cast
is needed in the assembler to silence a warning.
Port commit dfc894cd22d86ce42830e3bfdf485d963f6396ad
Port commit c33af9bd408eadd6b62571f862bcb5b763c98ad9
Change-Id: Ie37a1cfa8225fc12f367ff62139cc7cd8fa967d0
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/6396542
Reviewed-by: Victor Gomes <victorgomes@chromium.org>
Commit-Queue: Yahan Lu (LuYahan) <yahan@iscas.ac.cn>
Reviewed-by: Ji Qiu <qiuji@iscas.ac.cn>
Reviewed-by: Yahan Lu (LuYahan) <yahan@iscas.ac.cn>
Cr-Commit-Position: refs/heads/main@{#99706}
Refs: v8/v8@1441665
PR-URL: #60989
Reviewed-By: Richard Lau <richard.lau@ibm.com>
Reviewed-By: Beth Griggs <bethanyngriggs@gmail.com>1 parent 155eaed commit 2358296
5 files changed
Lines changed: 40 additions & 3 deletions
File tree
- deps/v8
- src
- codegen/riscv
- execution/riscv
- maglev/riscv
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -38,7 +38,7 @@ | |||
| 38 | 38 | ||
| 39 | 39 | # Reset this number to 0 on major V8 upgrades. | |
| 40 | 40 | # Increment by one for each non-official patch applied to deps/v8. | |
| 41 | - 'v8_embedder_string': '-node.39', | ||
| 41 | + 'v8_embedder_string': '-node.40', | ||
| 42 | 42 | ||
| 43 | 43 | ##### V8 defaults for Node.js ##### | |
| 44 | 44 | ||
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -334,3 +334,4 @@ Kotaro Ohsugi <dec4m4rk@gmail.com> | |||
| 334 | 334 | Jing Peiyang <jingpeiyang@eswincomputing.com> | |
| 335 | 335 | magic-akari <akari.ccino@gmail.com> | |
| 336 | 336 | Ryuhei Shima <shimaryuhei@gmail.com> | |
| 337 | + Domagoj Stolfa <domagoj.stolfa@gmail.com> | ||
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -115,8 +115,9 @@ void Assembler::set_target_compressed_address_at( | |||
| 115 | 115 | Address pc, Address constant_pool, Tagged_t target, | |
| 116 | 116 | WritableJitAllocation* jit_allocation, ICacheFlushMode icache_flush_mode) { | |
| 117 | 117 | if (COMPRESS_POINTERS_BOOL) { | |
| 118 | - Assembler::set_uint32_constant_at(pc, constant_pool, target, jit_allocation, | ||
| 119 | - icache_flush_mode); | ||
| 118 | + Assembler::set_uint32_constant_at(pc, constant_pool, | ||
| 119 | + static_cast<uint32_t>(target), | ||
| 120 | + jit_allocation, icache_flush_mode); | ||
| 120 | 121 | } else { | |
| 121 | 122 | UNREACHABLE(); | |
| 122 | 123 | } | |
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -538,6 +538,7 @@ class Simulator : public SimulatorBase { | |||
| 538 | 538 | // Return central stack view, without additional safety margins. | |
| 539 | 539 | // Users, for example wasm::StackMemory, can add their own. | |
| 540 | 540 | base::Vector<uint8_t> GetCentralStackView() const; | |
| 541 | + static constexpr int JSStackLimitMargin() { return kAdditionalStackMargin; } | ||
| 541 | 542 | ||
| 542 | 543 | void IterateRegistersAndStack(::heap::base::StackVisitor* visitor); | |
| 543 | 544 | ||
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -224,6 +224,40 @@ void CheckedIntPtrToInt32::GenerateCode(MaglevAssembler* masm, | |||
| 224 | 224 | Operand(std::numeric_limits<int32_t>::min())); | |
| 225 | 225 | } | |
| 226 | 226 | ||
| 227 | + void CheckFloat64SameValue::SetValueLocationConstraints() { | ||
| 228 | + UseRegister(target_input()); | ||
| 229 | + // We need two because LoadFPRImmediate needs to acquire one as well in the | ||
| 230 | + // case where value() is not 0.0 or -0.0. | ||
| 231 | + set_temporaries_needed((value().get_scalar() == 0) ? 1 : 2); | ||
| 232 | + set_double_temporaries_needed( | ||
| 233 | + value().is_nan() || (value().get_scalar() == 0) ? 0 : 1); | ||
| 234 | + } | ||
| 235 | + | ||
| 236 | + void CheckFloat64SameValue::GenerateCode(MaglevAssembler* masm, | ||
| 237 | + const ProcessingState& state) { | ||
| 238 | + Label* fail = __ GetDeoptLabel(this, deoptimize_reason()); | ||
| 239 | + MaglevAssembler::TemporaryRegisterScope temps(masm); | ||
| 240 | + DoubleRegister target = ToDoubleRegister(target_input()); | ||
| 241 | + if (value().is_nan()) { | ||
| 242 | + __ JumpIfNotNan(target, fail); | ||
| 243 | + } else { | ||
| 244 | + DoubleRegister double_scratch = temps.AcquireScratchDouble(); | ||
| 245 | + Register scratch = temps.AcquireScratch(); | ||
| 246 | + __ Move(double_scratch, value().get_scalar()); | ||
| 247 | + __ CompareF64(scratch, EQ, double_scratch, target); | ||
| 248 | + __ BranchFalseF(scratch, fail); | ||
| 249 | + if (value().get_scalar() == 0) { // +0.0 or -0.0. | ||
| 250 | + __ MacroAssembler::Move(scratch, target); | ||
| 251 | + __ And(scratch, scratch, Operand(1ULL << 63)); | ||
| 252 | + if (value().get_bits() == 0) { | ||
| 253 | + __ BranchTrueF(scratch, fail); | ||
| 254 | + } else { | ||
| 255 | + __ BranchFalseF(scratch, fail); | ||
| 256 | + } | ||
| 257 | + } | ||
| 258 | + } | ||
| 259 | + } | ||
| 260 | + | ||
| 227 | 261 | void Int32AddWithOverflow::SetValueLocationConstraints() { | |
| 228 | 262 | UseRegister(left_input()); | |
| 229 | 263 | UseRegister(right_input()); | |
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