Commit 7eb0ac3
deps: patch V8 to support compilation on win-arm64
PR-URL: #47251
Reviewed-By: Yagiz Nizipli <yagiz@nizipli.com>
Reviewed-By: Jiawen Geng <technicalcute@gmail.com>
Reviewed-By: Rafael Gonzaga <rafael.nunu@hotmail.com>
Reviewed-By: Richard Lau <rlau@redhat.com>1 parent a7c129f commit 7eb0ac3
4 files changed
Lines changed: 21 additions & 14 deletions
File tree
- deps/v8
- src
- execution/arm64
- trap-handler
- test/cctest
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -36,7 +36,7 @@ | |||
| 36 | 36 | ||
| 37 | 37 | # Reset this number to 0 on major V8 upgrades. | |
| 38 | 38 | # Increment by one for each non-official patch applied to deps/v8. | |
| 39 | - 'v8_embedder_string': '-node.2', | ||
| 39 | + 'v8_embedder_string': '-node.3', | ||
| 40 | 40 | ||
| 41 | 41 | ##### V8 defaults for Node.js ##### | |
| 42 | 42 | ||
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -34,6 +34,11 @@ | |||
| 34 | 34 | #include "src/trap-handler/trap-handler-simulator.h" | |
| 35 | 35 | #endif // V8_ENABLE_WEBASSEMBLY | |
| 36 | 36 | ||
| 37 | + #if defined(_MSC_VER) | ||
| 38 | + // define full memory barrier for msvc | ||
| 39 | + #define __sync_synchronize _ReadWriteBarrier | ||
| 40 | + #endif | ||
| 41 | + | ||
| 37 | 42 | namespace v8 { | |
| 38 | 43 | namespace internal { | |
| 39 | 44 | ||
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -34,8 +34,10 @@ uintptr_t ProbeMemory(uintptr_t address, uintptr_t pc) | |||
| 34 | 34 | // "ProbeMemory", but we want something more expressive on stack traces. | |
| 35 | 35 | #if V8_OS_DARWIN | |
| 36 | 36 | asm("_v8_internal_simulator_ProbeMemory"); | |
| 37 | - #else | ||
| 37 | + #elif !defined(_MSC_VER) | ||
| 38 | 38 | asm("v8_internal_simulator_ProbeMemory"); | |
| 39 | + #else // MSVC | ||
| 40 | + ; | ||
| 39 | 41 | #endif | |
| 40 | 42 | ||
| 41 | 43 | } // namespace v8::internal::trap_handler | |
| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
@@ -14771,12 +14771,12 @@ static void AtomicMemoryWHelper(AtomicMemoryLoadSignature* load_funcs, | |||
| 14771 | 14771 | AtomicMemoryStoreSignature* store_funcs, | |
| 14772 | 14772 | uint64_t arg1, uint64_t arg2, uint64_t expected, | |
| 14773 | 14773 | uint64_t result_mask) { | |
| 14774 | - uint64_t data0[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14775 | - uint64_t data1[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14776 | - uint64_t data2[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14777 | - uint64_t data3[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14778 | - uint64_t data4[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14779 | - uint64_t data5[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14774 | + uint64_t data0[2] = {arg2, 0}; | ||
| 14775 | + uint64_t data1[2] = {arg2, 0}; | ||
| 14776 | + uint64_t data2[2] = {arg2, 0}; | ||
| 14777 | + uint64_t data3[2] = {arg2, 0}; | ||
| 14778 | + uint64_t data4[2] = {arg2, 0}; | ||
| 14779 | + uint64_t data5[2] = {arg2, 0}; | ||
| 14780 | 14780 | ||
| 14781 | 14781 | SETUP(); | |
| 14782 | 14782 | SETUP_FEATURE(LSE); | |
@@ -14838,12 +14838,12 @@ static void AtomicMemoryXHelper(AtomicMemoryLoadSignature* load_funcs, | |||
| 14838 | 14838 | AtomicMemoryStoreSignature* store_funcs, | |
| 14839 | 14839 | uint64_t arg1, uint64_t arg2, | |
| 14840 | 14840 | uint64_t expected) { | |
| 14841 | - uint64_t data0[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14842 | - uint64_t data1[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14843 | - uint64_t data2[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14844 | - uint64_t data3[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14845 | - uint64_t data4[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14846 | - uint64_t data5[] __attribute__((aligned(kXRegSize * 2))) = {arg2, 0}; | ||
| 14841 | + uint64_t data0[2] = {arg2, 0}; | ||
| 14842 | + uint64_t data1[2] = {arg2, 0}; | ||
| 14843 | + uint64_t data2[2] = {arg2, 0}; | ||
| 14844 | + uint64_t data3[2] = {arg2, 0}; | ||
| 14845 | + uint64_t data4[2] = {arg2, 0}; | ||
| 14846 | + uint64_t data5[2] = {arg2, 0}; | ||
| 14847 | 14847 | ||
| 14848 | 14848 | SETUP(); | |
| 14849 | 14849 | SETUP_FEATURE(LSE); | |
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