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Revert "deps: V8: cherry-pick 13192d6e10fa" · nodejs/node@ea50540 · GitHub

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Commit ea50540

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kxxt
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richardlau
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Revert "deps: V8: cherry-pick 13192d6e10fa"
This reverts commit bc2ebb9, which shouldn't be applied to v20.x. Fix nodejs/unofficial-builds#106 PR-URL: #51495 Fixes: nodejs/unofficial-builds#106 Reviewed-By: Franziska Hinkelmann <franziska.hinkelmann@gmail.com> Reviewed-By: Michaël Zasso <targos@protonmail.com> Reviewed-By: Stewart X Addison <sxa@redhat.com> Reviewed-By: Richard Lau <rlau@redhat.com> Reviewed-By: Luigi Pinca <luigipinca@gmail.com>
1 parent 1ab9ff4 commit ea50540

6 files changed

Lines changed: 16 additions & 16 deletions

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‎common.gypi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@
3636

3737
# Reset this number to 0 on major V8 upgrades.
3838
# Increment by one for each non-official patch applied to deps/v8.
39-
'v8_embedder_string': '-node.17',
39+
'v8_embedder_string': '-node.18',
4040

4141
##### V8 defaults for Node.js #####
4242

‎deps/v8/src/builtins/riscv/builtins-riscv.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1512,7 +1512,7 @@ static void Generate_InterpreterEnterBytecode(MacroAssembler* masm) {
15121512
// Set the return address to the correct point in the interpreter entry
15131513
// trampoline.
15141514
Label builtin_trampoline, trampoline_loaded;
1515-
Tagged<Smi> interpreter_entry_return_pc_offset(
1515+
Smi interpreter_entry_return_pc_offset(
15161516
masm->isolate()->heap()->interpreter_entry_return_pc_offset());
15171517
DCHECK_NE(interpreter_entry_return_pc_offset, Smi::zero());
15181518

‎deps/v8/src/codegen/riscv/assembler-riscv-inl.h‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -128,9 +128,9 @@ Handle<HeapObject> Assembler::compressed_embedded_object_handle_at(
128128
}
129129

130130
void Assembler::deserialization_set_special_target_at(
131-
Address instruction_payload, Tagged<Code> code, Address target) {
131+
Address instruction_payload, Code code, Address target) {
132132
set_target_address_at(instruction_payload,
133-
!code.is_null() ? code->constant_pool() : kNullAddress,
133+
!code.is_null() ? code.constant_pool() : kNullAddress,
134134
target);
135135
}
136136

@@ -159,13 +159,12 @@ void Assembler::deserialization_set_target_internal_reference_at(
159159
}
160160
}
161161

162-
Tagged<HeapObject> RelocInfo::target_object(PtrComprCageBase cage_base) {
162+
HeapObject RelocInfo::target_object(PtrComprCageBase cage_base) {
163163
DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_));
164164
if (IsCompressedEmbeddedObject(rmode_)) {
165-
return HeapObject::cast(
166-
Tagged<Object>(V8HeapCompressionScheme::DecompressTagged(
167-
cage_base,
168-
Assembler::target_compressed_address_at(pc_, constant_pool_))));
165+
return HeapObject::cast(Object(V8HeapCompressionScheme::DecompressTagged(
166+
cage_base,
167+
Assembler::target_compressed_address_at(pc_, constant_pool_))));
169168
} else {
170169
return HeapObject::cast(
171170
Object(Assembler::target_address_at(pc_, constant_pool_)));
@@ -187,7 +186,8 @@ Handle<HeapObject> RelocInfo::target_object_handle(Assembler* origin) {
187186
}
188187
}
189188

190-
void RelocInfo::set_target_object(Tagged<HeapObject> target,
189+
void RelocInfo::set_target_object(Heap* heap, HeapObject target,
190+
WriteBarrierMode write_barrier_mode,
191191
ICacheFlushMode icache_flush_mode) {
192192
DCHECK(IsCodeTarget(rmode_) || IsEmbeddedObjectMode(rmode_));
193193
if (IsCompressedEmbeddedObject(rmode_)) {

‎deps/v8/src/codegen/riscv/assembler-riscv.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -286,7 +286,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase,
286286
// This is for calls and branches within generated code. The serializer
287287
// has already deserialized the lui/ori instructions etc.
288288
inline static void deserialization_set_special_target_at(Address location,
289-
Tagged<Code> code,
289+
Code code,
290290
Address target);
291291

292292
// Get the size of the special target encoded at 'instruction_payload'.

‎deps/v8/src/execution/riscv/simulator-riscv.cc‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1781,7 +1781,7 @@ void RiscvDebugger::Debug() {
17811781
sreg_t value;
17821782
StdoutStream os;
17831783
if (GetValue(arg1, &value)) {
1784-
Tagged<Object> obj(value);
1784+
Object obj(value);
17851785
os << arg1 << ": \n";
17861786
#ifdef DEBUG
17871787
obj.Print(os);
@@ -1830,7 +1830,7 @@ void RiscvDebugger::Debug() {
18301830
PrintF(" 0x%012" PRIxPTR " : 0x%016" REGIx_FORMAT
18311831
" %14" REGId_FORMAT " ",
18321832
reinterpret_cast<intptr_t>(cur), *cur, *cur);
1833-
Tagged<Object> obj(*cur);
1833+
Object obj(*cur);
18341834
Heap* current_heap = sim_->isolate_->heap();
18351835
if (obj.IsSmi() ||
18361836
IsValidHeapObject(current_heap, HeapObject::cast(obj))) {
@@ -4692,7 +4692,7 @@ bool Simulator::DecodeRvvVS() {
46924692
Builtin Simulator::LookUp(Address pc) {
46934693
for (Builtin builtin = Builtins::kFirst; builtin <= Builtins::kLast;
46944694
++builtin) {
4695-
if (builtins_.code(builtin)->contains(isolate_, pc)) return builtin;
4695+
if (builtins_.code(builtin).contains(isolate_, pc)) return builtin;
46964696
}
46974697
return Builtin::kNoBuiltinId;
46984698
}
@@ -4709,7 +4709,7 @@ void Simulator::DecodeRVIType() {
47094709
if (builtin != Builtin::kNoBuiltinId) {
47104710
auto code = builtins_.code(builtin);
47114711
if ((rs1_reg() != ra || imm12() != 0)) {
4712-
if ((Address)get_pc() == code->instruction_start()) {
4712+
if ((Address)get_pc() == code.InstructionStart()) {
47134713
sreg_t arg0 = get_register(a0);
47144714
sreg_t arg1 = get_register(a1);
47154715
sreg_t arg2 = get_register(a2);

‎deps/v8/src/regexp/riscv/regexp-macro-assembler-riscv.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1211,7 +1211,7 @@ static T* frame_entry_address(Address re_frame, int frame_offset) {
12111211
int64_t RegExpMacroAssemblerRISCV::CheckStackGuardState(Address* return_address,
12121212
Address raw_code,
12131213
Address re_frame) {
1214-
Tagged<InstructionStream> re_code = InstructionStream::cast(Object(raw_code));
1214+
InstructionStream re_code = InstructionStream::cast(Object(raw_code));
12151215
return NativeRegExpMacroAssembler::CheckStackGuardState(
12161216
frame_entry<Isolate*>(re_frame, kIsolateOffset),
12171217
static_cast<int>(frame_entry<int64_t>(re_frame, kStartIndexOffset)),

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