Hello @robcasloz

We would like your help in tackling a scenario where slot limitation also depends with instructions with immediates.

Please have a look below,
The VLIW target that we are trying to experiment can access immediates only through references where 1 packet can access three 8 bit immediate values.

Consider the following scenarios,

Scenario 1
BUNDLE {
%r1 = ADDri %r1, 20,
%r0 = ADDri %r0, 20,
}
Please check the allocation slots below,

Scenario 2
BUNDLE {
%r1 = ADDri %r1, 20,
%r0 = ADDri %r0, 20,
%r2 = SUBri %r2, 20,
}
Please check the allocation slots below,

Scenario 3
BUNDLE {
%r1 = ADDri %r1, 20,
%r3 = ADD %r3, %r5,
%r4 = SUB %r4, %r5,
}
Please check the allocation slots below,

Scenario 4
BUNDLE {
%r1 = ADDri %r1, 20,
%r0 = ADDri %r0, 40,
%r2 = SUBri %r2, 60,
}
Please check the allocation slots below,

Scenario 5
BUNDLE {
%r1 = ADDri %r1, 1200,
%r4 = ADDri %r4, 14,
}
Please check the allocation slots below,

Scenario 6
BUNDLE {
%r1 = ADDri %r1, 1200,
%r0 = ADDri %r0, 4800,
%r4 = ADDri %r4, 1,
}
Please check the allocation slots below,

We are facing issue with Scenario 6, as "1200" decimal is converted to two 8 byte decimal value. And considering scenario 6, we are accessing five 8 bit immediate values.

Can you please provide suggestion on how to make Unison aware of such restrictions so that such bundles are not generated.
In our case ADD instr has ALU_ALL slots, thus added in single bundle.

Regards,
Utkarsh