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pkgsrc/cad at trunk · vcontext/pkgsrc · GitHub

Name		Name	Last commit message	Last commit date
parent directory ..
MyHDL-gplcver		MyHDL-gplcver
MyHDL-iverilog		MyHDL-iverilog
adms		adms
atlc		atlc
boolean		boolean
cascade		cascade
cgi-wcalc		cgi-wcalc
covered		covered
dinotrace-mode		dinotrace-mode
dinotrace		dinotrace
diylc		diylc
eagle		eagle
electric		electric
fastcap		fastcap
fasthenry		fasthenry
felt		felt
freehdl		freehdl
gdsreader		gdsreader
geda		geda
gerbv		gerbv
ghdl		ghdl
gnetman		gnetman
gnucap		gnucap
gplcver		gplcver
gsmc		gsmc
gtk1-wcalc		gtk1-wcalc
gtk2-wcalc		gtk2-wcalc
gtkwave		gtkwave
iverilog		iverilog
kicad-doc		kicad-doc
kicad-footprints		kicad-footprints
kicad-i18n		kicad-i18n
kicad-packages3d		kicad-packages3d
kicad-symbols		kicad-symbols
kicad-templates		kicad-templates
kicad		kicad
klayout		klayout
librecad		librecad
libwcalc		libwcalc
magic		magic
mcalc		mcalc
mex-wcalc		mex-wcalc
mpac		mpac
nelma		nelma
ng-spice		ng-spice
ntesla		ntesla
oce		oce
openscad		openscad
p5-gds2		p5-gds2
pcb		pcb
py-MyHDL		py-MyHDL
py-PyRTL		py-PyRTL
py-gds		py-gds
py-gdscad		py-gdscad
py-simpy		py-simpy
qcad-partlibrary		qcad-partlibrary
qcad		qcad
sci-wcalc		sci-wcalc
solvespace		solvespace
spice		spice
spiceprm		spiceprm
stdio-wcalc		stdio-wcalc
tkgate		tkgate
tnt-mmtl		tnt-mmtl
transcalc		transcalc
verilator		verilator
verilog-mode		verilog-mode
veriwell		veriwell
wcalc-docs		wcalc-docs
wcalc		wcalc
xchiplogo		xchiplogo
xcircuit		xcircuit
Makefile		Makefile

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