Soft microprocessor - Wikipedia (FazBrowse)

A soft microprocessor (also called softcore microprocessor or a soft processor) is a microprocessor core that can be wholly implemented using logic synthesis. It can be implemented via different semiconductor devices containing programmable logic (e.g., FPGA, CPLD), including both high-end and commodity variations.

Most systems, if they use a soft processor at all, only use a single soft processor. However, a few designers tile as many soft cores onto an FPGA as will fit. In those multi-core systems, rarely used resources can be shared between all the cores in a cluster.

While many people put exactly one soft microprocessor on a FPGA, a sufficiently large FPGA can hold two or more soft microprocessors, resulting in a multi-core processor. The number of soft processors on a single FPGA is limited only by the size of the FPGA. Some people have put dozens or hundreds of soft microprocessors on a single FPGA. This is one way to implement massive parallelism in computing and can likewise be applied to in-memory computing.

A soft microprocessor and its surrounding peripherals implemented in a FPGA is less vulnerable to obsolescence than a discrete processor.

No http://www.arm.com/products/system-ip/interconnect/index.php 70–200Yes Atmel AVR-compatible 8-bit RISC http://opencores.org/project,pavr VHDL softavrcore Andras Pal No PLB, OPB, FSL, LMB, AXI4 https://web.archive.org/web/20030430214925/http://www.xilinx.com/microblaze/ OpenFire Virginia Tech CCM Lab Yes Ultra-small-footprint microsequencer-based 8051 core 312 Artix-7 LUTs. Quad-core 8051 version is 1227 LUTs. http://www.microcorelabs.com TSK51/52 Altium CC BY-NC 3.0; commercial applicants have to pay a licence fee Pipelined bus MIPS I instruction set pipeline stages http://www.dossmatik.de/mais-cpu.html VHDL TSK3000A Altium No https://web.archive.org/web/20030501203653/http://www.xilinx.com/picoblaze/ VHDL, Verilog based on the RISC-V instruction set architecture f32c University of Zagreb Yes AXI4 / Avalon 32-bit, RISC-V, up to 340Yes AMBA2 SPARC V8 http://www.esa.int/TEC/Microelectronics/SEMUD70CYTE_0.html VHDL LEON3/4 Aeroflex Gaisler Yes 64-bit http://www.opensparc.net/opensparc-t1/index.html Verilog Tacus/PIPE5 TemLib Yes 8088 BIU provided. Others easy to create. Cycle accurate 8088/8086 implemented with a microsequencer. Less than 2% utilization of Kintex-7. http://www.microcorelabs.com s80x86 Jamie Iles 3-clause BSD Avalon i486SX compatible core https://github.com/alfikpl/ao486 Verilog based on the PowerPC/Power instruction set architecture PowerPC 405S IBM No CoreConnect 32-bit PowerPC v.2.05 Book E Verilog Microwatt IBM/OpenPOWER BSD/LGPLv2+ Wishbone 64-bit PowerISA 3.0. CPU/GPU/VPU implementation and custom vector instructions https://libre-soc.org Python/nMigen A2I IBM/OpenPOWER No 16/32/64-bit ISA RISC https://www.synopsys.com/designware-ip/processor-solutions.html Verilog ERIC5 Entner Electronics No Custom 32-bit RISC-V M Extension, SoC defined by C++ http://www.fpga-cores.com/instant-soc/ VHDL JOP Martin Schoeberl Yes Wishbone http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/index.cfm Verilog LXP32 Alex Kuznetsov Yes Wishbone, B4/pipelined 32-bit RISC/Vector CPU implementing the MRISC32 ISA https://mrisc32.bitsnbites.eu/ VHDL NEO430 Stephan Nolting Yes Wishbone 32-bit; done in ASIC, Actel, Altera, Xilinx FPGA. https://openrisc.io/ Verilog SpartanMC TU Darmstadt / TU Dresden No XSOC abstract bus 16-bit RISC CPU and SoC featured in Circuit Cellar Magazine #116-118 http://www.fpgacpu.org/xsoc/index.html Schematic YASEP Yann Guidon Yes Wishbone Stack based CPU, configurable 16/32 bit datapath, eCos support http://opensource.zylin.com/zpu.htm VHDL RISC5 Niklaus Wirth Maxfield, Clive (September 8, 2006). "FPGA Architectures from 'A' to 'Z' : Part 2". Embedded.com. Archived from the original on 2007-10-08. Retrieved 2012-08-18. Abstracted from Chapter 4 of Vassányi, István (1998). "Implementing Processor Arrays on FPGAs". In Hartenstein, Reiner W.; Keevallik, Andres (eds.). Field-Programmable Logic and Applications: From FPGAs to Computing Paradigm. Lecture Notes in Computer Science (LNCS), volume 1482. Springer Berlin Heidelberg. pp. 446–450. doi:10.1007/BFb0055278. ISBN 978-3-540-64948-9. Retrieved 2026-09-09. Presented at the 8th International Workshop on Field-Programmable Logic and Applications (FPL'98), held in Tallinn, Estonia, August 31 to September 3, 1998.

↑ "},"date":{"wt":"September 21, 2009"},"website":{"wt":"Design And Reuse (D&R)"},"department":{"wt":"Industry Articles"}},"i":0}}]}'/>Wang, Zhoukun; Hammami, Omar (September 21, 2009). "A 24 Processors System on Chip FPGA Design with Network on Chip". Industry Articles. Design And Reuse (D&R).

↑ / Micro16 Array - A Simple CPU Array"},"url":{"wt":"https://members.optusnet.com.au/jekent/Micro16Array/index.html"},"date":{"wt":"5 June 2004 "},"url-status":{"wt":"dead"},"archive-url":{"wt":"https://web.archive.org/web/20230424080624/https://members.optusnet.com.au/jekent/Micro16Array/index.html"},"archive-date":{"wt":"2023-04-24"},"website":{"wt":"John's FPGA Page"}},"i":0}}]}'/>Kent, John (5 June 2004). "Micro16 - A Simple 16 bit VHDL CPU / Micro16 Array - A Simple CPU Array". John's FPGA Page. Archived from the original on 2023-04-24.

↑ "},"url":{"wt":"https://www.fastcompany.com/1714174/1000-core-cpu-achieved-your-future-desktop-will-be-supercomputer"},"archive-url":{"wt":"https://web.archive.org/web/20251028192522/https://www.fastcompany.com/1714174/1000-core-cpu-achieved-your-future-desktop-will-be-supercomputer"},"archive-date":{"wt":"2025-10-28"},"access-date":{"wt":"2026-09-09"},"work":{"wt":"Fast Company"},"language":{"wt":"en-US"}},"i":0}}]}'/>Eaton, Kit (January 4, 2011). "1,000 Core CPU Achieved: Your Future Desktop Will Be a Supercomputer". Fast Company. Archived from the original on 2025-10-28. Retrieved 2026-09-09.

↑ Swan, John; Krzyzak, Tomek (March 5, 2008). "Using FPGAs to avoid microprocessor obsolescence". Embedded. UBM Communities. Archived from the original on 2016-10-13.

↑

View original on Wikipedia | Back | FazBrowse Home