| FazBrowse GitHub Viewer | Trending | | Home |
| Tools: [Original HTTPS Page] |
Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.
You must be logged in to block users.
Contact GitHub support about this user’s behavior. Learn more about reporting abuse.
Report abuseAI Compiler Engineer @ 10xEngineers | LLM Inference Optimization|Computer Architecture
I specialize in bridging the gap between hardware and software to accelerate AI workloads. My focus is on the RISC-V Software Ecosystem (RISE), creating high-performance kernels for LLM inference.
Recent commits optimizing for RISC-V:
Sytem verilog code for single cycle RISCV-32I processor.It supports all the base level instructions.
SystemVerilog 1
Python project to get starting and ending timestamps of each word from audio
Jupyter Notebook
| Back | FazBrowse Home | New Git URL |