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ChipForge_SN84 ChipForge_SN84 Public
ChipForge (SN84) introduces the first digital design subnet for decentralized hardware innovation. This subnet enables miners to compete in designing real silicon. Processor development is organize…
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chipforge_eda_server chipforge_eda_server Public
EDA server for simulating and validating hardware designs described in Verilog/SystemVerilog, focusing on functionality, performance, area, and power evaluation.
Python 1
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chipforge-mcu chipforge-mcu Public
Open-source RISC-V processor core with hardware cryptography acceleration, developed through decentralized hardware competitions on Bittensor Subnet 84 (ChipForge).
SystemVerilog 1
Repositories
- chipforge_eda_server Public
EDA server for simulating and validating hardware designs described in Verilog/SystemVerilog, focusing on functionality, performance, area, and power evaluation.
- rvgen Public
Pure-Python RISC-V instruction generator with built-in functional coverage, auto-regression, and CI-ready dashboards.
- ChipForge_SN84 Public
ChipForge (SN84) introduces the first digital design subnet for decentralized hardware innovation. This subnet enables miners to compete in designing real silicon. Processor development is organized into on-chain challenges — spanning AI accelerators, cryptographic modules, mini-GPUs, and other critical components.
- chipforge-mcu Public
Open-source RISC-V processor core with hardware cryptography acceleration, developed through decentralized hardware competitions on Bittensor Subnet 84 (ChipForge).
- coralnpu Public Forked from google-coral/coralnpu
A machine learning accelerator core designed for energy-efficient AI at the edge.
- document_insights_base_model Public
- Identity-Subnet Public
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