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atfox272 (Tran Tai) · GitHub

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  1. Dual-issue-Microcontroller Dual-issue-Microcontroller Public

    RTL code for Dual-issue microcontroller (Verilog)

    C 3 1

  2. AXI4-Interconnect AXI4-Interconnect Public

    RTL code for AXI4 Interconnect (Verilog). Supports weighted round-robin arbitration, n-channel master, 4Kb splitting, reorder transaction.

    Verilog 37 7

  3. dcasic dcasic Public

    Verilog 1

  4. dma dma Public

    RTL code for DMA controller

    SystemVerilog 12 5

  5. DVP-RX-Controller DVP-RX-Controller Public

    This repository contains the RTL code of a DVP (Digital Video Port) TX Controller with AXI4 interface in the application layer.

    Verilog 1 2

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