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jasonlin316 (Yi-Chien Lin) · GitHub

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jasonlin316/README.md

I am a Research Scientist at Meta's AI System Co-Design team.

I obtained my Ph.D. in Electrical Engineering at University of Southern California, advised by Prof. Viktor Prasanna. My dissertation focused on Automated Graph ML Systems, such as an auto-tuning runtime system for GNN training. I was also a Research Intern at Microsoft AI Framework team, where I worked on automatic model parallelization for LLM serving. I received my B.S. in Electrical Engineering from National Taiwan University (NTU).

In addition to research interests, I'm also into video editing and photography. Check out my vlogs and photos.

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  1. RISC-V-CPU RISC-V-CPU Public

    A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.

    Verilog 152 28

  2. A-Single-Path-Delay-32-Point-FFT-Processor A-Single-Path-Delay-32-Point-FFT-Processor Public

    A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-frequency) algorithm. The average SNR = 58.76.

    Verilog 51 13

  3. Systolic-Array-for-Smith-Waterman Systolic-Array-for-Smith-Waterman Public

    This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times faster than a software running the same algorithm.

    Verilog 28 8

  4. GCN-Inference-Acceleration-HLS GCN-Inference-Acceleration-HLS Public

    An end-to-end GCN inference accelerator written in HLS

    C++ 18 4

  5. microsoft/apex_plus microsoft/apex_plus Public

    APEX+ is an LLM Serving Simulator

    Python 51 14

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