Add Waveshare RP2350-POE-ETH-8DI-8RO board support - #19637
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Pull request overview
Adds a new RP2 (RP2350) board definition for the Waveshare RP2350-POE-ETH-8DI-8RO, including pin mappings and configuration to use the onboard WizNET W5500 with MicroPython’s networking stack.
Changes:
- Introduces board-level CMake, manifest, and metadata files (including RISC-V variant selection).
- Adds hardware configuration for UART/I2C/SPI, flash sizing, and W5500 defaults to support network.WIZNET5K() with no arguments.
- Defines Pin.board aliases via pins.csv and provides a short usage note in readme.md.
Reviewed changes
Copilot reviewed 9 out of 9 changed files in this pull request and generated 1 comment.
Show a summary per file| File | Description |
|---|---|
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/waveshare_rp2350_poe_eth_8di_8ro.h | Pico-sdk board header defining default peripheral pins and flash config. |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/mpconfigboard.h | MicroPython board config enabling networking and W5500 pin/SPI bindings. |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/mpconfigboard.cmake | Build-time board setup (GPIO count, flash/storage sizing, lwIP + W5500). |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/mpconfigvariant.cmake | Default (ARM) RP2350 platform selection. |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/mpconfigvariant_RISCV.cmake | RISC-V RP2350 platform selection for the board variant. |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/manifest.py | Pulls in base port manifest and requires the networking bundle. |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/pins.csv | Provides Pin.board aliases for relays, digital inputs, SD, RTC, RS485, and W5500. |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/readme.md | Documents how to bring up Ethernet using network.WIZNET5K(). |
| ports/rp2/boards/WAVESHARE_RP2350_POE_ETH_8DI_8RO/board.json | Board metadata for docs/build tooling (features, URL, variants). |
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| // UART0 is exposed on the pin header. | ||
| #define PICO_DEFAULT_UART 0 | ||
| #define PICO_DEFAULT_UART_TX_PIN 0 | ||
| #define PICO_DEFAULT_UART_RX_PIN 1 | ||
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| // The default I2C bus connects to the RTC and the pin header. | ||
| #define PICO_DEFAULT_I2C 1 | ||
| #define PICO_DEFAULT_I2C_SDA_PIN 6 | ||
| #define PICO_DEFAULT_I2C_SCL_PIN 7 | ||
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| // The default SPI bus connects to the SD card slot. SPI0 is used by W5500. | ||
| #define PICO_DEFAULT_SPI 1 | ||
| #define PICO_DEFAULT_SPI_SCK_PIN 26 | ||
| #define PICO_DEFAULT_SPI_TX_PIN 27 | ||
| #define PICO_DEFAULT_SPI_RX_PIN 28 | ||
| #define PICO_DEFAULT_SPI_CSN_PIN 31 | ||
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| // Flash configuration. | ||
| #define PICO_BOOT_STAGE2_CHOOSE_W25Q080 1 | ||
| #define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024) | ||
| #define PICO_FLASH_SPI_CLKDIV 2 |
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Code size report: Reference: extmod: Add USB Network (NCM) driver implementation. [1c3c201]
Comparison: Add Waveshare RP2350-POE-ETH-8DI-8RO board support [merge of b1d9caf]
mpy-cross: +0 +0.000%
bare-arm: +0 +0.000%
minimal x86: +0 +0.000%
unix x64: +0 +0.000% standard
stm32: +0 +0.000% PYBV10
esp32: +0 +0.000% ESP32_GENERIC
mimxrt: +0 +0.000% TEENSY40
rp2: +0 +0.000% RPI_PICO_W
samd: +0 +0.000% ADAFRUIT_ITSYBITSY_M4_EXPRESS
qemu rv32: +0 +0.000% VIRT_RV32
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Summary
Add board definition for Waveshare RP2350-POE-ETH-8DI-8RO. Most notably the integrated WizNET W5500
Testing
Tested on real hardware.
Generative AI
I used generative AI tools when creating this PR, but a human has checked the
code and is responsible for the code and the description above.