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AXI-DMA-master-verification AXI-DMA-master-verification Public
Forked from letitbe0201/AXI-DMA-master-verification
SystemVerilog 1
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FloatingPointAddition FloatingPointAddition Public
Forked from ShervinAmbrose/FloatingPointAddition
Verilog 1
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SystemVerilog_Coding_Practice SystemVerilog_Coding_Practice Public
Forked from deoregaurav92/SystemVerilog_Coding_Practice
SystemVerilog 1
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Parallel-to-Serial-Interface-using-Asynch-FIFO- Parallel-to-Serial-Interface-using-Asynch-FIFO- Public
Forked from deoregaurav92/Parallel-to-Serial-Interface-using-Asynch-FIFO-
Low Power parallel to serial interface using asynchronous FIFO
SystemVerilog 1
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Verilog_Coding_Practice Verilog_Coding_Practice Public
Forked from deoregaurav92/Verilog_Coding_Practice
Verilog 1
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