A small language for building and simulating logic circuits - for people learning how computers work. In the spirit of Nand2Tetris and Petzold's Code.

A digital design language by Nicklaus Wirth, similar to VHDL and Verilog, but much simpler and easier to master.

High-performance C++20 Static Timing Analysis (STA) engine and circuit compiler utilizing cache-conscious DAG topological traversals and Data-Oriented Design