Apache Ignite

Apache Ignite 3

A secure, high-performance, multi-tenant micro-service platform for remote "App Management" and "Computing"

[ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and runs ML models compiled using the puma compiler.

[Nature Machine Intelligence 2023] "Echo state graph neural networks with analogue random resistive memory arrays."

Software side of an LLM running inside a DRAM chip via charge-sharing PIM (BitNet b1.58 on DRAM-Bender silicon).

Apache Ignite Website

The DaiSy Library for Fast and Exact, Data Series and Vector Similarity Search

A computational foundation for AGI based on hyperdimensional computing and set theory.

Emerging Threats and Countermeasures in Neuromorphic Systems: A Survey. By designing and analyzing Memristor Devices for Neuromorphic Computing, Spiking Neural Networks (SNNs), Physically Unclonable Functions (PUFs), True Random Number Generators (TRNGs), we are investigating their hardware and software security (attacks and defenses).

In-Memory Accelerator Controller

☁️ Apache Ignite

in-depth analysis and comparison of eight leading in-memory subgraph matching algorithms, QuickSI, GraphQL, CFL, CECI, DP-iso, RI, and VF2++.

Device-to-algorithm neuromorphic: train spiking neural nets in snnTorch, then deploy on a simulated memristor crossbar with measured SnS2 device non-idealities.

Behavioral compute-SNR analysis and website for voltage-driven resistive crossbar IMCs

Hardware-aware S4D state-space models on simulated analog memristor crossbars: a reproducible neuromorphic in-memory computing co-design study (PyTorch, CPU-only).

We present an analog in-memory computing (AIMC) evaluation framework, providing SW/HW performance for LLM inference.

Analog Robustness CI — will your AI model survive analog hardware? Break-even economics + noise/drift/ADC robustness simulation for AIMC and photonic accelerators.

Cache optimization and in-memory computing research focusing on performance, latency, and energy-efficient hybrid memory systems.