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Large collection of number systems providing custom arithmetic for mixed-precision algorithm development and optimization for AI, Machine Learning, Computer Vision, Signal Processing, CAE, EDA, control, optimization, estimation, and approximation.
PACoGen: Posit Arithmetic Core Generator
Universal number Posit HDL Arithmetic Architecture generator
Open-Source Posit RISC-V Core with Quire Capability
PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications
A Deep Learning Framework for the Posit Number System
Posit Arithmetic Cores generated with FloPoCo
This repository provides a parameterized hardware implementation of a Posit Arithmetic Unit (PAU) written in Verilog. It supports addition, subtraction, multiplication, and division over configurable posit formats, and includes a full verification framework using a C++ golden reference model.
VHDL implementation of a vectorized posit division and square root unit (Master's thesis, FAU Erlangen-Nürnberg)
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