FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool

Project implementations for the NAND2Tetris (Elements of Computing Systems) course, building a complete computer system from NAND gates to a functional CPU using HDL and low-level system design.

Digital Logic Design Project materials & coursework featuring logic design, K-Map simplification, code converters, circuits and Smart Railway Gate System Project analysis during my CSE 2102 coursework.

Spring 2024 NYCU Integrated Circuit Design Laboratory (ICLAB)

A collection of Verilog-based digital design projects, from basic gates to complex modules like ALUs, FSMs, and memory units. Ideal for learning RTL design and synthesis.

⚡ A collection of Digital Logic Design (DLD) lab work and projects 🔌. Includes circuit designs, truth tables, simulations, and practical implementations. Covers core concepts of logic gates, combinational & sequential circuits, and hands-on problem-solving in digital systems.

🔌 A curated collection of 25 Digital Logic Design circuits — adders, multiplexers, decoders, demultiplexers, latches & number detectors — organized, documented, and visualized.

Comprehensive Digital Electronics notes and lecture PDFs for Computer Science and Engineering (CSE). Covers number systems, logic gates, Boolean algebra, combinational and sequential circuits, multiplexers, decoders, and more.

VHDL Lab Exercises from simple Combinational/Sequential circuits to a simple CPU design

This repository contains my assignments and projects for the Digital Systems course. The course covers the fundamental concepts of digital systems, including Boolean algebra, logic gates, combinational and sequential circuits, memory, and programmable logic devices. I have included VHDL code and simulation results for some of the projects.

An automatic traffic light controller is designed and simulated using the concept of Finite State Machine in ModelSim.

This project implement a synchronous sequential circuit which detects two different 4-bit sequences, A and B.

Verilog practice and solutions on HDLBits website

4-player digital quiz buzzer built in Logisim Evolution — first-press priority lockout using AND gates + SR latches, plus a countdown answer timer with auto-reset.

This is a projects have been completed through 2 parts of nand2tetris course on coursera.

Sequential Smart Traffic Light Controller built in Verilog for a two-road intersection with emergency vehicle override, pedestrian crossing, and fault detection.

An execution unit that is able to do the following commands: Move Value to Register, Move Register to Register, Add Value to Register, Add Register to Register, AND Value to Register and AND Register to Register.

A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.

Digital Design Lab - Autumn Semester 2021 - Indian Institute of Technology Bombay

Find your required RTL code in this repo :)