MASM: non-AVX VEX fix, x64 home space, vzeroupper on VAES exits - #11290
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MASM: non-AVX VEX fix, x64 home space, vzeroupper on VAES exits#11290kaleb-himes wants to merge 2 commits into
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Can one of the admins verify this patch? |
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retest this please. (no logs) |
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August 27, 2026 00:31
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August 27, 2026 14:00
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retest this please (aborted, no test failure). |
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Relates to: https://github.com/wolfSSL/scripts/pull/656 |
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Description @SparkiDev
vzeroupper: After using the wide 256-bit registers, this instruction wipes their upper halves before returning. Without it, the next ordinary SSE code in the program runs slow. Speed only, nothing computes wrong. (Intel Optimization Reference Manual, "Mixing AVX and SSE code".)
vmovd → movd: Three ECC routines are the versions used on old CPUs that lack AVX, but each had an AVX-only instruction in it. Those CPUs crash. Proved it: under an emulated Nehalem the old library dies with SIGILL, the fixed one passes. (Intel SDM Vol. 2A §2.3.)
sub rsp,32 before calls: Windows requires the caller to set aside 32 bytes of stack for the function it calls. We weren't, so the callee could overwrite our data. Windows only. (Microsoft, "x64 calling convention".)
The big block-copy change: Copies now use plain integer registers instead of vector ones. We didn't need this fix; it came along because you require the committed asm to match the generator exactly, and that's what the generator emits. I can remove item 4 if there is an outstanding PR on the scripts/ repo that fixes the generators and simply hasn't merged yet.
Testing
Emulation and virtualized.
Checklist