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Fix conditional operator in e203_exu_alu_muldiv by sylwpro · Pull Request #47 · SI-RISCV/e200_opensource · GitHub
This repository was archived by the owner on Mar 24, 2021. It is now read-only.
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Fix conditional operator in e203_exu_alu_muldiv
- #47
#47
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sylwpro
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Fix conditional operator in e203_exu_alu_muldiv
#47
sylwpro
wants to merge 1 commit into
SI-RISCV:master
SI-RISCV/e200_opensource:master
from
sylwpro:pull_request_conditional
sylwpro/e200_opensource:pull_request_conditional
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Change in conditional operator
700a32c
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