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bcheng1997 (Brian Cheng) · GitHub

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  1. place-and-route place-and-route Public

    MS Technical Paper - A study on placement algorithms for heterogeneous FPGAs.

    Verilog 4 3

  2. ANC_System ANC_System Public

    BS Senior Design Project - FPGA active noise cancellation system.

    VHDL 4

  3. 495_CPU 495_CPU Public

    A simple 8-bit CPU.

    VHDL

  4. Julia_Morph Julia_Morph Public

    A simple CUDA/C++ application to visualize and animate Julia Sets in real-time.

    Cuda

  5. Pong Pong Public

    Arcade pong on a 32x32 LED matrix.

    VHDL

  6. RGB_LED RGB_LED Public

    Personal project: VHDL code to drive a 32x32 RGB LED matrix using 24-bit color

    VHDL 5

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