Big/optional bi (PA-RISC 1.1 and 2.0)"},"extensions":{"wt":"[[Multimedia Acceleration eXtensions]] (MAX), MAX-2"},"open":{"wt":"No"},"gpr":{"wt":"32"},"fpr":{"wt":"32 64-bit (16 64-bit in PA-RISC 1.0)"},"successor":{"wt":"PA-WideWord → [[Itanium]]<ref>{{Cite web |url=https://www.hpl.hp.com/news/2001/apr-jun/itanium.html |title=Inventing Itanium: How HP Labs helped create the next-generation chip architecture |date=1 June 2001 |access-date=2024-03-24 |website=HP Labs |archive-url=https://web.archive.org/web/20020207061639/https://www.hpl.hp.com/news/2001/apr-jun/itanium.html |archive-date=2002-02-07}}</ref>"}},"i":0}}]}'>
HP PA-RISC 7300LC microprocessor
HP 9000 C110 PA-RISC workstation booting Debian Linux
↑ Worley, William S. (August 1986). "In this Issue" (PDF). Hewlett-Packard Journal. 37 (8): 3. Archived from the original (PDF) on 18 January 2024. The HP Precision Architecture development program, known within HP as the Spectrum program, ...
1 2 Mahon, Michael J.; Bei-Loh Lee, Ruby; Miller, Terrence C.; Huck, Jerome C.; Bryg, William R. (August 1986). "Hewlett-Packard Precision Architecture: The Processor" (PDF). Hewlett-Packard Journal. 37 (8). Archived from the original on 2 December 2023. Retrieved 2 December 2023.{{cite journal}}: CS1 maint: bot: original URL status unknown (link)
↑ Marston, A.; et al. (1987). "A 32b CMOS single-chip RISC type processor". 1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. pp. 28–29. doi:10.1109/ISSCC.1987.1157145. S2CID 61007482.
↑ "Third-Party PA-RISC Processors from Hitachi, Winbond, OKI – OpenPA.net".
 | |
| Designer | Hewlett-Packard |
|---|---|
| Bits | 64-bit (32→64) |
| Introduced | 1986 (1996 PA-RISC 2.0) |
| Version | 2.0 (1996) |
| Design | RISC |
| Encoding | Fixed |
| Branching | Compare and branch |
| Endianness | Big (PA-RISC 1.0) Big/optional bi (PA-RISC 1.1 and 2.0) |
| Extensions | Multimedia Acceleration eXtensions (MAX), MAX-2 |
| Open | No |
| Successor | PA-WideWord → Itanium |
| Registers | |
| General-purpose | 32 |
| Floating-point | 32 64-bit (16 64-bit in PA-RISC 1.0) |
HP PA-RISC 7300LC microprocessor
HP 9000 C110 PA-RISC workstation booting Debian Linux
Precision Architecture RISC (PA-RISC) or Hewlett Packard Precision Architecture (HP/PA or HPPA), is a general purpose computer instruction set architecture (ISA) developed by Hewlett-Packard from the 1980s until the 2000s.
The architecture was introduced on 26 February 1986, when the HP 3000 Series 930 and HP 9000 Model 840 computers were launched featuring the first implementation, the TS1. HP stopped selling PA-RISC-based HP 9000 systems at the end of 2008 but supported servers running PA-RISC chips until 2013. PA-RISC was succeeded by the Itanium (originally IA-64) ISA, jointly developed by HP and Intel.
Rosenbladt, Peter (September 1987). "In this Issue" (PDF). Hewlett-Packard Journal. 38 (9): 3. Archived (PDF) from the original on 26 April 2019. Retrieved 8 June 2018. ... In the March 1987 issue we described the HP 3000 Series 930 and HP 9000 Model 840 Computers, which were HP's first realizations of HP Precision Architecture in off-the-shelf TTL technology. ...