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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| Expand Up | @@ -166,12 +166,17 @@ static inline void* mi_prim_tls_slot(size_t slot) mi_attr_noexcept { | |
| __asm__ volatile ("mrc p15, 0, %0, c13, c0, 3\nbic %0, %0, #3" : "=r" (tcb)); | ||
| res = tcb[slot]; | ||
| #elif defined(__aarch64__) | ||
| void** tcb; MI_UNUSED(ofs); | ||
| // CPython: patched for watchOS support. | ||
| // Submitted upstream as microsoft/mimalloc#1444 | ||
| // Use a 64-bit temporary: on arm64_32 (ILP32), pointers are 32 bits | ||
| // but system registers are 64 bits. | ||
| uint64_t tp; MI_UNUSED(ofs); | ||
| #if defined(__APPLE__) // M1, issue #343 | ||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tcb)); | ||
|
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Choose a reason Spam Abuse Off Topic Outdated Duplicate Resolved Low QualityCould you add comment when you adding downstream code here Something like:
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Choose a reason Spam Abuse Off Topic Outdated Duplicate Resolved Low QualityWe need this when we upgrade mimalloc to the latest version
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Choose a reason Spam Abuse Off Topic Outdated Duplicate Resolved Low QualityAlso any chance you could try and upstream this to mimalloc? It seems like it's moved around a little but I think it's here now: https://github.com/microsoft/mimalloc/blob/dev3/include/mimalloc/prim/prim-tls.h#L103C15-L103C19 If we can get it upstreamed into the v3 branch then when we upgrade it'll just be there.
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Choose a reason Spam Abuse Off Topic Outdated Duplicate Resolved Low QualityI've added a comment; and I've submitted microsoft/mimalloc#1444 to upstream the equivalent change in mimalloc v3.
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|
||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tp)); | ||
| #else | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tcb)); | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tp)); | ||
| #endif | ||
| void** tcb = (void**)(uintptr_t)tp; | ||
| res = tcb[slot]; | ||
| #elif defined(__riscv) | ||
| void** tcb; MI_UNUSED(ofs); | ||
| Expand Down Expand Up | @@ -200,12 +205,15 @@ static inline void mi_prim_tls_slot_set(size_t slot, void* value) mi_attr_noexce | |
| __asm__ volatile ("mrc p15, 0, %0, c13, c0, 3\nbic %0, %0, #3" : "=r" (tcb)); | ||
| tcb[slot] = value; | ||
| #elif defined(__aarch64__) | ||
| void** tcb; MI_UNUSED(ofs); | ||
| // Use a 64-bit temporary: on arm64_32 (ILP32), pointers are 32 bits | ||
| // but system registers are 64 bits. | ||
| uint64_t tp; MI_UNUSED(ofs); | ||
| #if defined(__APPLE__) // M1, issue #343 | ||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tcb)); | ||
| __asm__ volatile ("mrs %0, tpidrro_el0\nbic %0, %0, #7" : "=r" (tp)); | ||
| #else | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tcb)); | ||
| __asm__ volatile ("mrs %0, tpidr_el0" : "=r" (tp)); | ||
| #endif | ||
| void** tcb = (void**)(uintptr_t)tp; | ||
| tcb[slot] = value; | ||
| #elif defined(__riscv) | ||
| void** tcb; MI_UNUSED(ofs); | ||
| Expand Down | ||
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